trellis
g2025011100_2Documenting the Lattice ECP5 bit-stream format
Project Trellis enables a fully open-source flow for ECP5 FPGAs using Yosys for Verilog synthesis and nextpnr for place and route. Project Trellis itself provides the device database and tools for bitstream creation.
Origin: devel/trellis
Category: devel
Size: 86.6MiB
License: ISCL
Maintainer: jbo@FreeBSD.org
Dependencies: 4 packages
Required by: 0 packages
Website: github.com/YosysHQ/prjtrellis
$
pkg install trellisDependencies (4)
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